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rggen 0.33.1

RgGen is a code generation tool for ASIC/IP/FPGA/RTL engineers. It will automatically generate source code related to configuration and status registers (CSR), e.g. SytemVerilog RTL, UVM RAL model, C header file, Wiki documents, from human readable register map specifications.

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Versões:

  1. 0.33.1 - January 23, 2024 (16 KB)
  2. 0.33.0 - January 22, 2024 (16 KB)
  3. 0.32.2 - January 03, 2024 (16 KB)
  4. 0.32.0 - December 28, 2023 (16 KB)
  5. 0.31.3 - October 18, 2023 (16 KB)
Mostrar todas as versões (67)

Runtime Dependencies (6):

Donos:

Pushed by:

Autores:

  • Taichi Ishitani

SHA 256 checksum:

01ed0bfb81985411af63ef02e1b98338b013a7e8e9f575ec4e3e5eb161541ce8

Total de downloads 91.025

Desta versão 2.737

Licença:

MIT

Versão Requerida do Ruby: >= 3.0

New versions require MFA: true

Version published with MFA: true

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