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rggen 0.9.0

RgGen is a code generation tool for ASIC/IP/FPGA/RTL engineers. It will automatically generate soruce code related to control/status registers (CSR), e.g. SytemVerilog RTL, UVM RAL model, from human readable register map documents.

Gemfile:
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install:
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Versions:

  1. 0.34.0 January 23, 2025 (16 KB)
  2. 0.33.4 November 28, 2024 (16 KB)
  3. 0.33.3 July 20, 2024 (16 KB)
  4. 0.33.2 June 11, 2024 (16 KB)
  5. 0.33.1 January 23, 2024 (16 KB)
  6. 0.9.0 July 26, 2019 (44 KB)
Show all versions (71 total)

Runtime Dependencies (3):

Development Dependencies (1):

bundler >= 0

Owners:

Pushed by:

Authors:

  • Taichi Ishitani

SHA 256 checksum:

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Total downloads 104,472

For this version 1,865

Version Released:

License:

MIT

Required Ruby Version: >= 2.3

New versions require MFA: true

Links: